Hardware operations for multi-tasking

Atomic hardware operations perform the whole operation, without any other task seeing an intermediate state. These operations can be used to synchronize tasks without using slow OS primitives, but compared to the non-atomic sequences of operations they tend to be slow. Atomic operations only work correctly on aligned addresses, even on hardware that otherwise does not require alignment.

!@ ( u1 a-addr – u2 ) gforth-experimental “store-fetch”

load u2 from a_addr, and store u1 there, as atomic operation

+!@ ( u1 a-addr – u2 ) gforth-experimental “add-store-fetch”

load u2 from a_addr, and increment this location by u1, as atomic operation

?!@ ( unew uold a-addr – uprev ) gforth-experimental “question-store-fetch”

load uprev from a_addr, compare it to uold, and if equal, store unew there, as atomic operation

Another hardware operation is the memory barrier. Unfortunately modern hardware often can reorder memory operations relative to other memory operations (as seen by a different core), and the memory barrier suppresses this reordering for one point in the execution of the task.

barrier ( ) gforth-experimental “barrier”

All memory operations before the barrier are performed before any memory operation after the barrier.